Monolithic three-dimensional integration of complementary two-dimensional field-effect transistors

Monolithic 3D integration of complementary WSe2 FETs has been achieved, featuring n-type FETs in tier 1 and p-type FETs in tier 2. Dense vias are realized using a pitch of less than 1 µm, facilitating 3D inverters as well as NAND and NOR logic functionalities.